TSMC begins production of 3nm chips

Taiwan Semiconductor Manufacturing Co. began manufacturing chips using its N3 (3nm class) manufacturing process. As usual, the contract manufacturer and its partners will take several quarters to perfect the technology and designs before they both go into high-volume manufacturing (HVM).

Photo Credit: TSMC TSMC has started pilot production of N3 chip at the Fab 18 plant, which is located at Southern Taiwan Science Park near Tainan, DigiTimes and TechTaiwan reported. Production of HVM chips using the node will start in the second half of the year, but as the cycle time for the new process is over 100 days, the first ones will be shipped in early 2023.

La TSMC's next-generation N3 node was designed for both smartphones and high-performance computing (HPC) applications, a deviation from the company's usual strategies that favor mobile projects. The process will aggressively use Extreme UltraViolet (EUVL) lithography for "over 20 layers" and will provide substantial improvements over the existing N5. TSMC promises 10% to 15% performance gain (with the same power and number of transistors), up to 30% power reduction (with the same clock and complexity), up to 70% logic density gain and up to 20% more density for SRAMs.

Photo Credit: TSMC It appears that the first customers to adopt TSMC's N3 technology will be Apple and Intel, although it is not clear what the chips produced with this node will be intended for. Other chip designers may wait for TSMC to introduce its N3E, an extended version of the N3, before moving on to 3nm. N3E is expected to feature an improved process window, offering a wider choice of manufacturing parameters to achieve good yields along with performance improvements. However, N3E will only be available in late 2023 or early 2024.