The Apple M1 Max design reveals a possible chiplet evolution
It appears that Apple has kept a secret inherent in its new M1 Max SoC. New photos of the underside of the chip reveal that it may actually have an interconnect bus that enables Multi-Chip-Module (MCM) scaling, allowing the company to stack multiple dies in a chiplet-based design. This could lead to chips with up to 40 CPU cores and 128 GPU cores. Apple has yet to confirm development of chiplet-based designs, but M1 Max could theoretically scale into a “M1 Max Duo” or even “M1 Max Quadro” configuration.
Apple has managed to wow the world not one, but already twice with the performance of its ARM-based M1 SoCs. M1 Max is undoubtedly a little monster: the 57 billion transistors it is made of allow Apple to scale up to 10 CPU cores and 24 or 32 GPU cores (depending on the configuration), all in a single 5nm chip. Adding modifications to a chiplet-based design would theoretically multiply computing resources and therefore performance.
You guys seeing this or am I just crazy? The actual M1 Max die has an entire hidden section on the bottom which was not shown at all in Apple's official renders of the M1 Max die. Just flip another M1 Max and connect it for an M1 Max Duo chip. Then use I / O die for M1 Max Quadra. https://t.co/McWmofJAls pic.twitter.com/JogRwUGvF6
- Vadim Yuryev (@VadimYuryev) December 2, 2021
The interconnection bus would allow Apple to downsize its chips by joining together multiple M1 Maxs. Of course, it's not just about pairing multiple M1 Max chips, but you'll still need to use specific interposer and packaging options for a chiplet-based design.
It is interesting to note that Apple's M1 Pro chip (which fits between the M1 and M1 Max SoCs) does not feature the interconnect bus. This likely means that Apple only expects users who need the additional graphics processing power in its M1 Max (such as graphics or television studios) to require further performance scaling via chiplet design.
Once again noting that Apple's marketing diagrams do NOT accurately represent the floor plan of its chips, here is a less fanciful interpretation of the Pro Mac SoC rumors.
Presenting Jade-C: The building block for Pro Mac SoCs. (M1 included for scale.) Pic.twitter.com/Lp8ZBDeLiu
- John Siracusa (@siracusa) May 21, 2021
The union of two Apple dies The 520mm² M1 Max in an “M1 Max Duo” chip could provide up to 20 CPU cores and 48 or 64 GPU units, as well as doubling system memory to 128GB and bandwidth up to 800Gb / s. A possible “M1 Max Quadro” solution with 40 CPU cores and 128 GPU cores would be even more complex. Perhaps an additional I / O die, as the source suggests, is the correct solution, but the possibilities abound. Apple could also sustain sufficient bandwidth between the dies via I / O technology similar to AMD's Infinity Fabric. Whether or not the larger chips require an I / O die remains an open question, as other leaks have suggested that the design will be expanded into a monolithic design.
Apple has managed to wow the world not one, but already twice with the performance of its ARM-based M1 SoCs. M1 Max is undoubtedly a little monster: the 57 billion transistors it is made of allow Apple to scale up to 10 CPU cores and 24 or 32 GPU cores (depending on the configuration), all in a single 5nm chip. Adding modifications to a chiplet-based design would theoretically multiply computing resources and therefore performance.
You guys seeing this or am I just crazy? The actual M1 Max die has an entire hidden section on the bottom which was not shown at all in Apple's official renders of the M1 Max die. Just flip another M1 Max and connect it for an M1 Max Duo chip. Then use I / O die for M1 Max Quadra. https://t.co/McWmofJAls pic.twitter.com/JogRwUGvF6
- Vadim Yuryev (@VadimYuryev) December 2, 2021
The interconnection bus would allow Apple to downsize its chips by joining together multiple M1 Maxs. Of course, it's not just about pairing multiple M1 Max chips, but you'll still need to use specific interposer and packaging options for a chiplet-based design.
It is interesting to note that Apple's M1 Pro chip (which fits between the M1 and M1 Max SoCs) does not feature the interconnect bus. This likely means that Apple only expects users who need the additional graphics processing power in its M1 Max (such as graphics or television studios) to require further performance scaling via chiplet design.
Once again noting that Apple's marketing diagrams do NOT accurately represent the floor plan of its chips, here is a less fanciful interpretation of the Pro Mac SoC rumors.
Presenting Jade-C: The building block for Pro Mac SoCs. (M1 included for scale.) Pic.twitter.com/Lp8ZBDeLiu
- John Siracusa (@siracusa) May 21, 2021
The union of two Apple dies The 520mm² M1 Max in an “M1 Max Duo” chip could provide up to 20 CPU cores and 48 or 64 GPU units, as well as doubling system memory to 128GB and bandwidth up to 800Gb / s. A possible “M1 Max Quadro” solution with 40 CPU cores and 128 GPU cores would be even more complex. Perhaps an additional I / O die, as the source suggests, is the correct solution, but the possibilities abound. Apple could also sustain sufficient bandwidth between the dies via I / O technology similar to AMD's Infinity Fabric. Whether or not the larger chips require an I / O die remains an open question, as other leaks have suggested that the design will be expanded into a monolithic design.