DRAM, are these the volatile memories of the future?
DRAM
Unisantis Electronics, a startup led by Fujio Masuok a, inventor of NAND memories, has developed Dynamic Flash Memory (DFM), a new type of volatile memory that promises four times the density of dynamic random access memory (DRAM) along with performance higher and lower power consumption.DRAM memory is based on charge storage cell arrays consisting of a capacitor and a transistor per bit. The capacitors charge the transistors when "1" is recorded in that cell and discharge when the value must be "0". Arrays are arranged in horizontal wordlines and vertical bitlines. Each column is made up of two “+” and “-” bitlines connected to their own sense amplifiers used to read / write data to / from the cells. Both read and write operations are performed on the wordline and it is impossible to address a single bit. Throughout the history of DRAM, manufacturers have focused on reducing cell size by applying new process structures and technologies in an attempt to increase capacity, reduce power consumption and improve performance.
Flash memory Dynamics of Unisantis uses a Dual Gate Surrounding Gate Transistor (SGT) to eliminate capacitors and uses 4F2 gain cell structures (which are smaller than the 6F2s used today by DRAMs), a feature that significantly increases the bit density (up to four times) compared to DRAMs. DFM is not the first type of capacitorless random access memory (RAM), but previous attempts have been unsuccessful.
According to Unisantis, unlike the ZRAMs (where the margins between 1 and 0 were too limited), its DFMs significantly increased the margins between '1' and '0', increasing the speed and improving the cell reliability. DFM uses the PL (Plate Line) gate to "stabilize" the FB (Floating Body) by separating the write "1" and erase "0" modes, states Unisantis.
Unisantis is a licensing company IP which does not produce memories or sell its technologies. The company's DFM will only hit the market if Unisantis can persuade the industry (ie SoC and memory manufacturers) to adopt its dynamic flash memory. Since DFM uses conventional CMOS materials and does not require very sophisticated manufacturing methods, it can actually be commercialized. Meanwhile, the company's IP Dual Gate Surrounding Gate Transistor (SGT) may be licensed by various parties wishing to take advantage of GAAFET-type transistors. DFM technology was first described by its inventors, Dr. Koji Sakui and Nozomu Harada, earlier this month at the 13th IEEE International Memory Workshop.
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NAND flash prices to rise faster than DRAM in 3Q21
Contract market prices for NAND flash memory are poised to rise faster than those for DRAM chips in the third quarter of 2021, according to industry sources.
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